Daniel White

9S12X ATD0 and ATD1 clock rates are different

Discussion created by Daniel White on Jul 8, 2008
Latest reply on Jul 8, 2008 by Daniel White
CPU: S912XDT256 mask 1M84E running at 40MHz
Compiler: CodeWarrior v4.5
 
 
PROBLEM:
I'm configuring ATD0 and ATD1 exactly the same way but ATD1 runs at half the speed of ATD0.
 
Both ATD modules are configured to acquire 8 samples on one channel and then interrupt. The interrupt changes the channel selection and starts the next conversion. I am setting port pins high at the start and low at the end of both ISRs to confirm the rate with my scope. ATD0 is generating an interrupt approx. every 112mS (which is the rate I calculated based on the register settings) and ATD1 is about twice that at around 220mS. The ISRs only take about 2-3uS to execute. Does anyone have a clue why ATD1 would behave differently?
 
Here is my initialization function:
 
void Init_ad(void)
{
  /* wrap at AN7 */
  ATD0CTL0 = 0b00000111;
 
  ATD0CTL1 = 0b00000111;
 
  /* turn on A/D & enable interrupt w/ fast flag clearing */
  ATD0CTL2 = ATD0CTL2_ADPU_MASK | ATD0CTL2_AFFC_MASK | ATD0CTL2_ASCIE_MASK;
  /* set for 8 conversions and cause ad to stop when debugging */
  ATD0CTL3 = 0b00000011;
 
  /* set for 10 bit res, 16 AD clock conversion & divide the bus clock by 20 */
  /*
  * This results in approx. 112 uS between interrupts 
  */
  ATD0CTL4 = 0b01101001;
  
  
  /* Start the first conversion */
  ATD0CTL5_DJM = 1; 
 
  /***************** INIT ADC 1 **************************/
  /* wrap at AN7 */
  ATD1CTL0 = 0b00000111;
 
  ATD1CTL1 = 0b00000111;
 
  /* turn on A/D & disable interrupt w/ fast flag clearing */
  ATD1CTL2 = ATD1CTL2_ADPU_MASK | ATD1CTL2_AFFC_MASK | ATD1CTL2_ASCIE_MASK;

  /* set for 8 conversions and cause ad to stop when debugging */
  ATD1CTL3 = 0b00000011;

  /* set for 10 bit res, 16 AD clock conversion & divide the bus clock by 20 */
  /*
  * This results in approx. 225 uS between interrupts
  */
  ATD1CTL4 = 0b01101001;
  
  /* Start the first conversion */
  ATD1CTL5_DJM = 1;  
 
} /* end Init_ad */

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