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UART5 PAD Muxing

Question asked by bipul pandey on Dec 14, 2016
Latest reply on Dec 22, 2016 by bipul pandey

Hi I need an assistance of UART5 configuration (pad muxing) in the BSP. I am working on WINCE7.0 BSP. I have done all pad configuration but still something that is left.

if anyone is having BSP UART5 muxing file please share .

 

// Config uart5.UART_RX_DATA to pad KEY_ROW1

HW_IOMUXC_SW_MUX_CTL_PAD_KEY_ROW1_WR(
BF_IOMUXC_SW_MUX_CTL_PAD_KEY_ROW1_SION_V(DISABLED)|
BF_IOMUXC_SW_MUX_CTL_PAD_KEY_ROW1_MUX_MODE_V(ALT4));

HW_IOMUXC_SW_PAD_CTL_PAD_KEY_ROW1_WR(
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_ROW1_HYS_V(ENABLED) |
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_ROW1_PUS_V(100K_OHM_PU) |
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_ROW1_PUE_V(PULL) |
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_ROW1_PKE_V(ENABLED) |
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_ROW1_ODE_V(DISABLED) |
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_ROW1_SPEED_V(100MHZ) |
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_ROW1_DSE_V(40_OHM) |
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_ROW1_SRE_V(SLOW));

HW_IOMUXC_UART5_UART_RX_DATA_SELECT_INPUT_WR(
 BF_IOMUXC_UART5_UART_RX_DATA_SELECT_INPUT_DAISY_V(KEY_ROW1_ALT4));

//----------------------------------------------------------------------------------------------------------------------
HW_IOMUXC_SW_MUX_CTL_PAD_KEY_COL1_WR(
BF_IOMUXC_SW_MUX_CTL_PAD_KEY_COL1_SION_V(DISABLED) |
BF_IOMUXC_SW_MUX_CTL_PAD_KEY_COL1_MUX_MODE_V(ALT4));

HW_IOMUXC_SW_PAD_CTL_PAD_KEY_COL1_WR(
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_COL1_HYS_V(ENABLED) |
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_COL1_PUS_V(100K_OHM_PU) |
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_COL1_PUE_V(PULL) |
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_COL1_PKE_V(ENABLED) |
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_COL1_ODE_V(DISABLED) |
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_COL1_SPEED_V(100MHZ) |
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_COL1_DSE_V(40_OHM) |
BF_IOMUXC_SW_PAD_CTL_PAD_KEY_COL1_SRE_V(SLOW));

HW_IOMUXC_UART5_UART_RX_DATA_SELECT_INPUT_WR(
 BF_IOMUXC_UART5_UART_RX_DATA_SELECT_INPUT_DAISY_V(KEY_ROW1_ALT4));

 

 

anything need to correct here 

Thanks

bipul Pandey 

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