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ADV7180 and IMX6 - does NTSC work?

Question asked by Simon Rogers on Dec 13, 2016
Latest reply on Oct 3, 2017 by James Covey-Crump

I have an IMX6Q to which is attached an ADV7180 using 8 bit BT.656. PAL CVBS input works flawlessly using either:

gst-launch tvsrc device="/dev/video1" ! imxv4l2sink

or using /unit_tests/mxc_v4l2_tvin.out

But I cannot get NTSC CVBS to work. The picture rolls as though the IMX6 cannot sync to the incoming video. I've followed the many threads on this forum but have not found a solution that works.

I've tested multiple sources of NTSC video, the 7180 has happily detected the NTSC format, I've tried different values of active_top. I've tried connecting up the hardware HSync and VSync, although they don't appear to be used with the working PAL setup.

 

Questions:

  1. Does NXP/Freescale test with a PAL input or NTSC input when they test their reference boards with mxc_v4l2_tvin.out?
  2. Is the IMX6 IPU expecting BT.656-3 or BT656-4? A change to the V bit in the SAV/EAV codes happened between these two revisions of the standard, and this would only affect NTSC. (The 7180 can be configured for either.)
  3. I connected the hardware HSync/VSync signals, but these aren't currently being used (I can disconnect them and PAL still works). Can I force the IMX6 to use these? I tried p->u.bt656.bt_sync_correct = 1; in adv7180.c but it still isn't depending on the hardware sync lines.
  4.  What is the impact of the different CSI clock modes: IPU_CSI_CLK_MODE_CCIR656_INTERLACED, IPU_CSI_CLK_MODE_GATED_CLK etc. Do these dictate use of the hardware H/V sync lines?

 

I'm running a Yocto build of Kernel 3.14.60.

 

My device tree pin mux for this device is:

MX6QDL_PAD_EIM_A24__IPU2_CSI1_DATA19 0x10
MX6QDL_PAD_EIM_A23__IPU2_CSI1_DATA18 0x10
MX6QDL_PAD_EIM_A22__IPU2_CSI1_DATA17 0x10
MX6QDL_PAD_EIM_A21__IPU2_CSI1_DATA16 0x10
MX6QDL_PAD_EIM_A20__IPU2_CSI1_DATA15 0x10
MX6QDL_PAD_EIM_A19__IPU2_CSI1_DATA14 0x10
MX6QDL_PAD_EIM_A18__IPU2_CSI1_DATA13 0x10
MX6QDL_PAD_EIM_A17__IPU2_CSI1_DATA12 0x10
MX6QDL_PAD_EIM_DA12__IPU2_CSI1_VSYNC 0x10
MX6QDL_PAD_EIM_DA11__IPU2_CSI1_HSYNC 0x10
MX6QDL_PAD_EIM_D17__IPU2_CSI1_PIXCLK 0x10

 

Thanks 

Simon

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