Fractional delay logic of eFlexPWM of MC56F82748

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Fractional delay logic of eFlexPWM of MC56F82748

1,697 Views
chuangangxu
Contributor II

Hi, 

I'm debugging the fractional delay loigc of eFlexPWM of MC56F82748 using P&E mode. The configuration is as attached.

In theory, the duty cycle of PWM45 is closed to PWM23. However the duty cycle of PWM45 is neither closed to PWM23 when PWM_VALUE3 = 250 nor closed to that when PWM_VALUE3 = 249. Actually the falling edge of PWM45 is in the middle of PWM23 when PWM_VALUE3 equals 249 and 250. Is there any configuration wrong i neglected?Attached is the project i am debugging. thanks.

 

172431_172431.gif1.gif172432_172432.gif2.gif172451_172451.gif3.gif

Original Attachment has been moved to: MC56F82748_FRAC_TEST.zip

Labels (1)
0 Kudos
7 Replies

1,119 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

Pls refer to the doc from the ticket.

https://community.nxp.com/docs/DOC-106350 

Hope it can help you

BR

XiangJun Rong

0 Kudos

1,119 Views
chuangangxu
Contributor II

Hi, xiangjun,

Thanks for your help!

The fractional part can also be observed in the oscilloscope using my configuration. However the question is the fractional resolution seems not 1/32 of the PWM clock(100MHz) (ie. 312ps). For example, the observed actual duty cycle of (4+ 31/32) is much less than the duty cycle of (5+0/32) and the difference is much higher than 312ps.  

0 Kudos

1,119 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

Do you pay attention that the bit 11_15 of PWMA_SMnFRACVAL1 register are valid?

BR

Xiangjun Rong

pastedImage_1.png

0 Kudos

1,119 Views
chuangangxu
Contributor II

Hi,

Many thanks!

I have already solved this issue. The resolution issue is caused by the register circled below. I can not find where to set this OCCS_DIVBY[PWM_DIV2] to 1 using P&E mode.

But i modify the register directlly and make it correct.

发件人: xiangjun.rong

发送时间: 2016年12月16日 15:27

收件人: Chuanggang Xu <Chuangang.Xu@belf.com>

主题: Re: - Re: Fractional delay logic of eFlexPWM of MC56F82748

NXP Community <https://community.freescale.com/resources/statics/1000/35400-NXP-Community-Email-banner-600x75.jpg>

Re: Fractional delay logic of eFlexPWM of MC56F82748

reply from xiangjun.rong<https://community.nxp.com/people/xiangjun.rong?et=watches.email.thread> in Digital Signal Controllers - View the full discussion<https://community.nxp.com/message/861166?commentID=861166&et=watches.email.thread#comment-861166>

0 Kudos

1,119 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Chuangang,

Do you want to use nano-edge PWM mode for eFlexPWM module so that you can generate the fractional duty cycle PWM signal for example setting the PWM value5 as 249 plus 31/32? If it is the case, you have to enable the internal PLL of eFlexPWM module, it is complicated.

Hope it can help you

BR

XiangJun Rong

0 Kudos

1,119 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

Pls refer to the ticket.

https://community.nxp.com/docs/DOC-332423 

BR

XiangJun Rong

0 Kudos

1,119 Views
chuangangxu
Contributor II

Hi, Xiangjun,

There seems no similar registers and any decription of the internal PLL of eflexPWM module in the datasheet or the reference manual of MC56F82748.1.gif

0 Kudos