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Question asked by Thomas Stegmeijer on Dec 12, 2016
Latest reply on Dec 12, 2016 by Kerry Zhou



A lot of LPC43xx devices have a problem with the CAN1 peripheral. 


Writes to the ADC, DAC, I2C, and I2S peripherals can update registers in the C_CAN controller. Specifically, writes to I2C0, MCPWM, and I2S can affect C_CAN1. Writes to I2C1, DAC, ADC0, and ADC1 can affect C_CAN0. The spurious C_CAN controller writes will occur at the address offset written to the other peripherals on the same bus.


Doen anyone know if the LPC43(S)67 have this bug as well. The errate does not contain this issue. 

We would like to use this processor for a new application but rely heavily on both CAN peripherals so we would like to know if anyone has encoutered such a problem on the LPC43(S)67. 


Thank you in advance.