How can I set TLB setting in i.MX6 with Linux ?
I have a question about TLB setting.
My customer plan to use MRAM for backup data in their system but they don't want to access via cache.
Because they want to avoid that i.MX couldn't write the data to MRAM.
When the cache is ON, there are some delay between writing cache and MRAM so there are some possibility that the it fail to write the data to MRAM.
I know i.MX6 can disable L1 I/D cache with BOOT_CFG3 and BOOT_CFG3.
However, all data doesn't access via cache if user set those bit.
They want disable cache only MRAM so it doesn't suit for them.
In that situation, I found that TLB which is inculded in MMU can set memory region attributes.
I think that this can suit for my customer's request.
Please refer section B4.4 of following document.
Therefore I need to set the TLB setting.
Which file do we use for TLB setting with i.MX6 ?