we use a LS1021A (LS1021AXE7KQB) in a costumer specific Design. As DDR3L-Ram we use 1x Nanya NT5CC256M16DP-DIH with 16-bit Data bus width and 1600MT/s. The control and address lines are terminated with 39Ohm-Resistors tied to VTT (0,675V).
According to the DDR3-L Compliance Test App (Keysight Test-App, Signal Analyzer: DSO90604A) the High Level VIH.CA (AC) and VIH.CA(DC) at the Adress an Control Input Pins (e.g. A2) are to low (see attached). 760mV instead of 810mV minimum according to the JEDEC Standard No. 79-3-1A.01, Table 4.
We already tried different Termination resistors (27R and 100R) with the same result.
What could be the reason for this?