I am running FIFO in "stop when full mode" at 400KHz I2C clock.
The sample rate is 800Hz and 400Hz.... switching over to 400Hz after 24 hours.
Due to the microprocessor MSP430 issues I have very few options to complete the FIFO transfer.
In the I2C specification (Notes on page 14 of the Rev6 version) the following is stated:
"5. A START condition immediately followed by a STOP condition (void message) is an illegal format. Many devices however are designed to operate properly under this condition."
Q1: Will the MMA8451Q operate correctly if the last byte of a FIFO transfer is completed by this I2C sequence.
(Start immediately followed by Stop with no other clocks in between)
Depending on your answer I may need to ask further questions to achieve a work around.
regards John Campbell