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LS102xA: PCIe ATU inbound configuration

Question asked by Tarek El-Sherbiny on Dec 5, 2016
Latest reply on Dec 6, 2016 by ufedor

In our application, the FPGA is the only endpoint connected to the LS1021A SoC over PCIe bus.

 

From the FPGA we need to access CCSR and OCRAM areas as inbound memory read. The CCSR is at physical address 0x100 0000 and OCRAM at physical address 0x1000 0000.

 

We are going to use Flat PCI bus address mapping. So FPGA will use address 0x100 0000 for accessing CCSR and address 0x1000 0000 for OCRAM.

 

My question is do we have to program the ATU inbound to map PCI address 0x100 0000 to Physical address 0x100 0000 for CCSR and PCI address 0x1000 0000 to Physical address 0x1000 0000?

 

In other words, the Inbound Base and Target are exactly the same!

 

If we did not configure the ATU inbound are we still going to achieve the same effect?

 

Your help is highly appreciated.

 

Thanks,

Tarek

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