[MPC5777M] FlexRay CC configuration

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[MPC5777M] FlexRay CC configuration

1,676 Views
eschick
Contributor III

Hi all,

after I received such a great and quick help to my FEC configuration problem I thought that someone might also help my with an other issue.

For some experimental testing I need to set up the FlexRay CC of the MPC5777M microcontroller to have a simple communication between two nodes. As the MPC5777M has two FlexRay CCs I thought it would be possible to let them communicate with each other. However, during the configuration of the first CC i was running into the issue that the CC doesn't leave the POC:config state. I configure it according to the Chapter 54.8.2.2 (Protocol Initialization) of the reference manual. First I initialize the FlexRay module and set up the pads. Than I issue command CONFIG, which is accepted by the CC, so I am able to set all protocol parameters within the PCR0,...,PCR30 registers. Afterwards I configure the message buffers and the fifos and issue command READY, but the microcontroller hangs up while waiting for the POC state to change to the POC:ready state. In my opinion there is something with my bessage buffer and fifo configuration. At the moment the configuration looks like follows:

    //MSG buffer config

    FR_0.MBSSUTR.B.LAST_MB_SEG1 = 2;
    FR_0.MBSSUTR.B.LAST_MB_UTIL = 4;
    FR_0.MBDSR.B.MBSEG1DS = FR_0.PCR19.B.payload_length_static;
    FR_0.MBDSR.B.MBSEG2DS = FR_0.PCR24.B.max_payload_length_dynamic;
    FR_0.MB[0].CCSR.B.MTD = 1; // 1 = transmit, 0 = receive
    FR_0.MB[0].CCSR.B.EDS = 1; // 1 = enabled, 2 = disabled
    FR_0.MB[0].CCFR.B.CHA = 1; // Channel A enabled
    FR_0.MB[0].CCFR.B.CHB = 0;  // Channel B disabled
    FR_0.MB[0].FIDR.B.FID = 8;
    FR_0.MB[0].IDXR.B.MBIDX = 0;

 

    //FIFO config
    FR_0.RFWMSR.R = 0x0000;
    FR_0.RFSIR.R = 14;        //
    FR_0.RFDSR.R = 0x0111;    //depth = 1, entry_size = 17

 

    FR_0.RFMIDAFMR.R = 0xFFFF; //acceptance mask for message id filtering

 

Hopefully, someone has an idea what is going wrong within my configuration.

 

Best regards,

Efim

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8 Replies

1,058 Views
umabk
Contributor III

Hi,

We're having some similar problems. Can you tell me if you are able to successfully write to the FR_MBIDXRn and FR_MBCCFRn registers during buffer config? In my attempts the value is always 0 irrespective of what I try to write to them. I make sure that both conditions for writing to these registers: POC:config and MB_DIS are fulfilled.

Any pointers would be helpful

Regards,

Uma

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1,058 Views
eschick
Contributor III

Hi Uma,

sorry for the delay in response.

Finally I was able to do the complete configuration and also write successfully to the FR_MBIDXRn and FR_MBCCFRn registers.

In my configuration first I configure the SYMATOR and the MCR registers. Then I enable the FR module, force the CC into POC:config state and wait until the CC reaches the POC:config state. After that I set the values of all PCRn registers and configure the Message Buffer, which inculdes setting the MBIDXRn and MBCCFRn registers. The last step then is to transit the CC into POC:ready state.

Hope this is helpfull for you.

Regards,

Efim

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1,058 Views
lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi,

we provide MCAL drivers for Flexray. Our resources to support customers who are writing own drivers are a little bit limited. But let me check if I can find someone who could be able to answer this question.

Regards,

Lukas

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1,058 Views
eschick
Contributor III

Hi Lukas,

thanks for your feedback. I hope you can find someone.

Best regards,

Efim

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1,058 Views
lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi Efim,

I was asked by experts - which clock is used for flexray module?

Regards,

Lukas

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1,058 Views
eschick
Contributor III

Hi Lukas,

in my configuration, PLL0_PHI is set to 400MHz and the CGM_AC2_DC0 Clock Devider has the value of 10.

So the FlexRay Clock should be 40MHz.

Best regards,

Efim

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1,058 Views
lukaszadrapa
NXP TechSupport
NXP TechSupport

I got this response:

Customer has wrong configuration of the PLL clock for FlexRay. It is mentioned in the RM that when the PLL is used for flexray there must be 80 MHz. 40 MHz is valid for crystal.

Regards,

Lukas

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1,058 Views
eschick
Contributor III

Hi Lukas,

thanks for the speedy response. I set the CGM_AC2_DC0 Clock Devider to 5, so the output FlexRay Clock is 80MHz, but the CC still remains in POC:config state.

Best regards,

Efim

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