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MK10DX256VLK7 Flexbus

Question asked by Quentin Barry on Dec 3, 2016
Latest reply on Dec 5, 2016 by Hui_Ma

The manual I am reading at the moment confuses me.  It states:

"When Flexbus is used in a multiplexed configuration, the full 32 bit address is driven on the first clock of a bus cycle (address phase).  After the first clock, the data is driven on the bus (data phase).  During the data phase, the address is driven on the pins not used for data.  For example, in 16-bit mode, the lower address is driven on FB_AD15 - FB_AD0, and in 8-bit mode, the lower address is driven on FB_AD23 - FB_AD0"

This confuses me as the MK10DX256VLK7 only has FB_AD0 to FB_AD19.  My question is thus, does this MCU place the full 20-bit address on the bus - FB_AD0 - FB_AD19?  I only want to make use of an 8-bit wide data bus.  Which lines must I latch?  Must I latch FB_AD0 - FB_AD15?  If so, to which lines do I connect the data bus to?  Do I connect D0 - D7 to FB_AD0 - FB_AD7 or do I connect D0 - D7 to FB_AD8 - FB_AD15?

The bus is multiplexed, and I am only using an 8-bit data bus.  The manual I am reading is a little cryptic.  Please help.

 

Regards

 

Quentin

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