I am using LPC54102xx64 with uVioson MDK 5.22 。
sometimes direct run into ROM ( like ISP mode, but the P0_31 is high), and sometimes run into startup code, and at both situations, most SYSCON registers are 0xAAAA AAAA, and need almost 10 seconds to run one asm line code at signal-step-debug (F11) mode.
Please help me , what happen and how to do?
below is screen snaps runing!!
My GOD! NXP Are you joking ?? You are kiding me !!!!!!!!!!
Maybe I find out the results. see Chip_SystemInit(void) and Board_SetupClocking(void)
Though
#define V4_UID (0x08C1FECE)
for 0x08C1FECE, still must use 96 M Hz as clock !!!!!!!!!!!!!!!!!!!!!!!!!!!!!
Hi Okcn,
What's going on?
I was wondering if you can tell me the demo you used, then I can replicate the issue on my site.
I'm looking forward to your reply.
Have a great day,
Ping
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Sorry, I do not use demo now, I am designing my owns.
my program most time ran to 0x300000B0 when clicked debug-button in keil uVsuion, but 0x300000B0 is ROM !. Generally we did not doubt NXP's code, so we thinked that is our error, so let harware deigner checked and check, so hardware deigner quarreled with software engineer, so debuged one by one disassemble codes with clear run-to-main setting, so into startup,then chip codes, and then board codes, and inside board_sysinit, (these code is similar as NXP's demo) found error occurred at Chip_Clock_SetMainClockSource(SYSCON_MAINCLKSRC_PLLOUT); witch is a function at driver.
so Why? Why? Why? PLL error?
Try! Try! and Try! That is full of painful !
All in All, found, the default : #define BOARD_MAINCLOCKRATE (100000000) //100Mhz
When: #define V4_UID (0x08C1FECE)
if (LPC_SYSCON->DEVICE_ID1 < V4_UID) { /* Older version of chips does not support > 96MHz (see errata) */
freq = 96000000;
so BOARD_MAINCLOCKRATE is 100Mhz.
and our lpc54102 CPUID just is 0x08C1FEFE ! also we had some 0x0881FECE .
in fact for 0x08C1FEFE, some chip can use 100M, some chip not, sometime can use, some time not ! oh, Like a Ghost！
When we force let BOARD_MAINCLOCKRATE = 96 Mhz for any chip. All Ghosts disapper. but till now poor hardware and software engineers had stick on this for half a month like a fool !!!
In fact, half years ago, this questions have appeared at https://community.nxp.com/message/856916?commentID=856916#comment-856916
Ah, NXP, Could mind supply more details on manuals/demo coded and comments/PCB design samples/answer questions in time ? for example STM can supply schematics/PCB/BOM/ and countless demo and .... for their eval boards, Why NXP not all, only part ? You know, only only when your chips are used, you can back your money, so Please destroy barriers ! Compare the type of questions on community, NXP will know most questions are specificin NXP, but are systemtic in STM community. that is why NXP is only No.2 on market.
If not our header want use 2 cores like LPC43xx and LPC54xx, I sure I will abandon you !
Now, NXP owns freescale, and Qualcomm got NXP,
Can we pre-know the the fate of LPC series ??
Hi,
Thanks for your reply.
The LPC will be keep going, and the next generation LPC MCU is LPC8xx and LPC54xxx series.
Hope this is clear.
Have a great day,
Ping
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Today,I found:
some codes wrote on flash are FFFFFF..........
about at 0x40~..... that should be some of vectors table, and at 0x17D~ that should be rt_lib_xxxx entries !!!
Why ? there are errors during download to flash.
but another small program is all OK, can download and can run right.
There are errors for the larger program download, and when debug, direct run to 0x300000B0, that is ROM area.
see attached images.
please help.