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Can't Set GPT2 reg (imx6ul_evk board)

Question asked by tony zhang on Nov 29, 2016
Latest reply on Feb 7, 2017 by zhujun zhu

Hi:

I want to use something about GPT2, then I should set some regs first, but try some ways, it always can't work.

1.  I use IMX_IO_P2V  to change the p address to v address.

     fiq_timer_base = (void __iomem *)IMX_IO_P2V(0x20e8000);

     writel(0, fiq_timer_base+GPT_CR);

when insmod the driver. It shows:

 

[ 20.341461] fiq_timer_base=0xf42e8000
[ 20.346933] Unable to handle kernel paging request at virtual address f42e8000
[ 20.354322] pgd = 88710000
[ 20.357063] [f42e8000] *pgd=8bf5b841, *pte=00000000, *ppte=00000000
[ 20.363447] Internal error: Oops: 827 [#1] SMP ARM
[ 20.368263] Modules linked in: motor(O+)
[ 20.372278] CPU: 0 PID: 56 Comm: insmod Tainted: G O 4.1.15-svn66 #5
[ 20.379784] Hardware name: Freescale i.MX6 Ultralite (Device Tree)
[ 20.385997] task: 882b5000 ti: 885b2000 task.ti: 885b2000
[ 20.391441] PC is at motor_init+0x158/0x2c4 [motor]
[ 20.396355] LR is at vprintk_emit+0x2e4/0x608
[ 20.400746] pc : [<7f002158>] lr : [<80081990>] psr: 60000013
[ 20.400746] sp : 885b3d98 ip : 885b2018 fp : 885b3dc4
[ 20.412252] r10: 00000000 r9 : 00000028 r8 : 884ca440
[ 20.417503] r7 : 7f000290 r6 : 06d00000 r5 : 00000000 r4 : f42e8000
[ 20.424056] r3 : 00000000 r2 : 80b22904 r1 : 885b2000 r0 : 00000019
[ 20.430611] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user
[ 20.437775] Control: 10c5387d Table: 8871006a DAC: 00000015
[ 20.443547] Process insmod (pid: 56, stack limit = 0x885b2210)
[ 20.449406] Stack: (0x885b3d98 to 0x885b4000)
[ 20.453797] 3d80: 8031de30 7f002000
[ 20.462012] 3da0: 80b25e98 06d00000 7f000290 7f002000 80b81b40 80b25e98 885b3e54 885b3dc8
[ 20.470228] 3dc0: 8000983c 7f00200c 882b5000 8040003e 885b3dfc 885b3de0 80077ac4 80077900
[ 20.478441] 3de0: 882b5000 60000013 000000d0 000000d0 885b3e14 885b3e00 80078278 80077900
[ 20.486658] 3e00: 80b22a7c 88001f00 885b3e54 885b3e18 80111db0 80835b80 885b3e44 800ad75c
[ 20.494871] 3e20: 00002d93 a0000013 00000000 7f000290 885b2000 884ca400 7f000290 7f0002d8
[ 20.503086] 3e40: 00000028 00000001 885b3e7c 885b3e58 800ad798 800097c0 885b3e7c 885b3e68
[ 20.511301] 3e60: 801057e4 885b3f40 00000001 884ca2c0 885b3f3c 885b3e80 800af314 800ad744
[ 20.519517] 3e80: 7f00029c 00007fff 800acd20 885b3e98 81373a50 800acb2c 7f00029c 00000000
[ 20.527731] 3ea0: 885b3f00 a08bde44 00000000 7f000290 7f0003bc 7f00029c 6e72656b 00006c65
[ 20.535944] 3ec0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 20.544154] 3ee0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 20.552369] 3f00: 00000000 00000000 00000000 80a93f30 800af960 000015be 006375d6 00636008
[ 20.560582] 3f20: 00000000 a08be5be 885b2000 00000000 885b3fa4 885b3f40 800afa10 800ada0c
[ 20.568796] 3f40: a08bd000 000015be a08bdb4c a08bda7e a08be3ec 00000410 00000580 00000000
[ 20.577007] 3f60: 00000000 00000000 00000013 00000014 0000000b 00000008 00000006 00000000
[ 20.585222] 3f80: 80077bac 000015be 7eebae04 7eebaf01 00000080 80010104 00000000 885b3fa8
[ 20.593436] 3fa0: 8000ff20 800af904 000015be 7eebae04 00636018 000015be 00636008 7eebaf01
[ 20.601651] 3fc0: 000015be 7eebae04 7eebaf01 00000080 00000000 00000000 000001a3 00000000
[ 20.609864] 3fe0: 7eebac20 7eebac10 00015178 76ef1840 60000010 00636018 8bf5e821 8bf5ec21
[ 20.618060] Backtrace:
[ 20.620583] [<7f002000>] (motor_init [motor]) from [<8000983c>] (do_one_initcall+0x88/0x210)
[ 20.629045] r6:80b25e98 r5:80b81b40 r4:7f002000
[ 20.633785] [<800097b4>] (do_one_initcall) from [<800ad798>] (do_init_module+0x60/0x1bc)
[ 20.641901] r10:00000001 r9:00000028 r8:7f0002d8 r7:7f000290 r6:884ca400 r5:885b2000
[ 20.649888] r4:7f000290
[ 20.652486] [<800ad738>] (do_init_module) from [<800af314>] (load_module+0x1914/0x1ef8)
[ 20.660510] r6:884ca2c0 r5:00000001 r4:885b3f40
[ 20.665242] [<800ada00>] (load_module) from [<800afa10>] (SyS_init_module+0x118/0x124)
[ 20.673179] r10:00000000 r9:885b2000 r8:a08be5be r7:00000000 r6:00636008 r5:006375d6
[ 20.681161] r4:000015be
[ 20.683758] [<800af8f8>] (SyS_init_module) from [<8000ff20>] (ret_fast_syscall+0x0/0x54)
[ 20.691871] r8:80010104 r7:00000080 r6:7eebaf01 r5:7eebae04 r4:000015be
[ 20.698736] Code: e1530005 0a000000 e12fff33 e5944000 (e5845000)
[ 20.705063] ---[ end trace 9168b1fab5e20050 ]---
Segmentation fault
root@172 /$ [ 107.453762] random: nonblocking pool is initialized

 

2. I change another way to get v address.

   fiq_timer_base = ioremap(0x20e8000,SZ_16K);

   writel(0, fiq_timer_base+GPT_CR);

 

while the code run in " writel(0, fiq_timer_base+GPT_CR);" it can't return.

 

I don't know why. if I want to set the reg about imx6ul, what should I do.

 

PS: In fsl-linux-4.15 source code packet, I can't find the head file about imx6ul which define the reg address and interrupt number ...

 

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