We experience strange behaviour with our TJA1100-based design. A prototype spin of 11 boards were made, each with 5x TJA1100 devices, i.e. 55x ports in total. Implementation is irrelevant to the question, but two are in RMII mode, one in MII mode and two in reverse-MII mode. Power, decoupling and output filtering are all very close to the TR1329 reference design.
Most ports behave fine without any issue: we can transmit IP traffic at full bandwidth with no loss to external link partners from both NXP & Broadcom so the design itself seems OK.
However, some ports behave strangely and some are dead altogether. I did some DCR measurements on unconnected & unpowered (entirely floating) boards, and found the resistance between the transceiver pins and ground are not consistent, with some being close to zero ohms, and some being half of others. Since the internal termination is likely active with transistors, this is not expected to be necessarily a useful measurement when unpowered, but those that measure 0R also have 0V (or very close to it) when powered.
When powered, some of the pins with lower resistance also affects the DC bias, i.e.those with lower resistance also has a correspondingly lower bias of e.g. 1.5V instead of 2V. This even happens in reset, so where a normal PHY has a 3.3V bias when in reset, these pins would be a lower value.
What was also strange is that the resistance tended to differ between boards, but are consistent between PHY's on the same board despite having only shared ground and VCC.
The boards have been X-rayed and no soldering issues are evident.
Some examples of what was found:
BOARD1:
PHY1: 100R to GND (both pins); 130R differential. PHY operational.
PHY2: 100R to GND (both pins); 130R differential. PHY operational.
PHY3: 64R & 68R to GND respectively; 96R differential. PHY operational.
PHY4: 100R & 0R to GND respectively; 100R differential. Link fail.
PHY5: 100R & 64R to GND respectively; 114R differential. PHY operational.
BOARD2:
PHY1: 114R to GND (both pins); 132R differential. PHY operational.
PHY2: 114R & 0R to GND respectively; 114R differential. Link fail.
PHY3: 114R & 56R to GND respectively; 128R differential. PHY operational.
PHY4: 114R to GND (both pins); 132R differential. PHY operational.
PHY5: 114R to GND (both pins); 132R differential. PHY operational.
BOARD3:
PHY1: 120R to GND (both pins); 132R differential. PHY operational.
PHY2: 120R to GND (both pins); 132R differential. PHY operational.
PHY3: 120R to GND (both pins); 132R differential. PHY operational.
PHY4: 66R & 0R to GND; 68R differential. Link fail.
PHY5: 120R to GND (both pins); 132R differential. PHY operational.
BOARD4:
PHY1: 83R & 0R to GND respectively; 83R differential. Link fail.
PHY2: 0R to GND (both pins); 0R differential. Link fail.
PHY3: 85R to GND (both pins); 132R differential. PHY operational.
PHY4: 83R & 0R to GND respectively; 83R differential. Link fail.
PHY5: 85R to GND (both pins); 132R differential. PHY operational.
BOARD5 & 6:
All PHY's: 750R to GND (appears to have capacitive component); 133R differential. PHY operational.
BOARD7:
All PHY's: 1500R to GND (appears to have capacitive component); 133R differential. PHY operational.
It should be noted that the boards with the most failures had its parts sourced from a different part order (all procured from NXP via Avnet and not a 3rd party). Any chance that they possibly were from a production batch with suspect QC?
