We are designing a PCB with IMX6UL processor and DDR3L. Accordingly we chose the PMIC part PF3001(MC32PF3001A7EP) ,to power the IMX6UL processor,DDR3L and other on-board peripherals.
Q1: Please confirm my understanding about the start-up configuration (Table32) available on Pg28 of the PMIC datasheet, as below.
1.VSNVS is generated first in the sequence
2.V33 is generated next in the sequence
3.Switching regulators SW1,SW2,SW3 output along with LDO1,LDO4 and
VCC_SD are finally generated, at the same time.
Also we are using the VLDO2 and VLDO3 to power on-board peripherals.
Q2:Can you please let me know what does the "OFF" implies in the "VLDO2_SEQ" and "VLDO3_SEQ" in the datasheet.
Does that mean, no voltage is available from LDO2 and LDO3 or the voltage output sequence can be configured.by the user.
Please find the below image for reference and clarify the above doubts.