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LPC4370 HSADC clocking issues

Question asked by Franz-Otto Witte on Nov 20, 2016
Latest reply on Dec 28, 2016 by soledad

I just have discovered that the HSADC of the LPC4370 generates a big amount of interference noise when I use the Audio-PLL as clock source. When I use the Main-PLL the noise is completely gone.


Audio-PLL running at 460.8 MHz

Main-PLL running at 204MHz

HSADC sample rate is 1536kHz.

Result: Interference noise (~9.6kHz) (synchronous) (1536/160) with a level of  +/- 200 digits = 10% of conversion range!!!

If I run the HSADC with a clock that is derived from the main-pll with a frequency of 1545,45 kHz, the interference noise is gone.

In my application I have to sample a signal quasi synchronously - which is not possible, when I use the main-pll.

Any suggestions what can be done - or is it simple a hw-limitation?


best regards