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UART Array Transfer Using DMA

Question asked by Shawn Mason on Nov 16, 2016
Latest reply on Nov 16, 2016 by Shawn Mason

I'm trying to transfer an array on at fixed intervals over the UART using DMA.  Sample code is below.  The code below only appears to transmit the first byte of the array, with other bytes mixed in sporadically.  I'm not sure if I need the FIFO setup or if I'm missing something else.  Any help would be appreciated.

 

Shawn

 

#define UART_BUFFER_LENGTH 9

uint32_t g_UARTBuf[9] = {0x24494c53,0x24494c53,0x24494c53,0x24494c53,0x24494c53,0x24494c53,0x24494c53,0x24494c53,0x24494c53};

void InitUART(void)

{

UART0->C2 &= ~(UART_C2_TCIE_MASK | UART_C2_RIE_MASK | UART_C2_ILIE_MASK |

UART_C2_RE_MASK | UART_C2_RWU_MASK | UART_C2_SBK_MASK |

UART_C2_TIE_MASK | UART_C2_TE_MASK);

UART0->BDH &= ~(UART_BDH_LBKDIE_MASK | UART_BDH_RXEDGIE_MASK |

UART_BDH_SBR_MASK);

UART0->BDL &= ~(UART_BDL_SBR_MASK);

UART0->BDL |= UART_BDL_SBR(65U);

UART0->C1 &= ~(UART_C1_LOOPS_MASK | UART_C1_UARTSWAI_MASK | UART_C1_M_MASK |

UART_C1_ILT_MASK | UART_C1_PE_MASK);

UART0->C3 &= ~(UART_C3_TXINV_MASK | UART_C3_ORIE_MASK | UART_C3_NEIE_MASK |

UART_C3_FEIE_MASK | UART_C3_PEIE_MASK);

UART0->C4 &= ~(UART_C4_MAEN1_MASK | UART_C4_MAEN2_MASK | UART_C4_M10_MASK |

UART_C4_BRFA_MASK);

UART0->C4 |= UART_C4_BRFA(3U);

UART0->C5 &= ~(UART_C5_RDMAS_MASK);

UART0->C5 |= UART_C5_TDMAS_MASK;

UART0->MODEM &= ~(UART_MODEM_RXRTSE_MASK | UART_MODEM_TXRTSPOL_MASK |

UART_MODEM_TXRTSE_MASK | UART_MODEM_TXCTSE_MASK);

UART0->IR &= ~(UART_IR_IREN_MASK);

UART0->PFIFO &= ~(UART_PFIFO_TXFE_MASK | UART_PFIFO_TXFIFOSIZE_MASK |

UART_PFIFO_RXFE_MASK | UART_PFIFO_RXFIFOSIZE_MASK);

UART0->CFIFO &= ~(UART_CFIFO_RXOFE_MASK | UART_CFIFO_TXOFE_MASK |

UART_CFIFO_RXUFE_MASK);

UART0->CFIFO |= (UART_CFIFO_TXFLUSH_MASK | UART_CFIFO_RXFLUSH_MASK);

UART0->C7816 &= ~(UART_C7816_ONACK_MASK | UART_C7816_ANACK_MASK |

UART_C7816_INIT_MASK | UART_C7816_TTYPE_MASK | UART_C7816_ISO_7816E_MASK);

 

UART0->C2 |= (UART_C2_TIE_MASK | UART_C2_TE_MASK);

}

...

DMA0->TCD[2].CSR &= ~(DMA_CSR_BWC_MASK | DMA_CSR_MAJORELINK_MASK |

DMA_CSR_ESG_MASK | DMA_CSR_DREQ_MASK | DMA_CSR_INTHALF_MASK |

DMA_CSR_DONE_MASK | DMA_CSR_INTMAJOR_MASK);

DMA0->TCD[2].CSR |= DMA_CSR_BWC(3U);

DMA0->TCD[2].SADDR = (uint32_t)(&g_UARTBuf[0]);

DMA0->TCD[2].SOFF = 4U;

DMA0->TCD[2].ATTR = 0x0200;

DMA0->TCD[2].NBYTES_MLNO = (4)*(UART_BUFFER_LENGTH);

DMA0->TCD[2].SLAST = (-4)*(UART_BUFFER_LENGTH);;

DMA0->TCD[2].DADDR = (uint32_t)&(UART0->D);

DMA0->TCD[2].DOFF = 0;

DMA0->TCD[2].CITER_ELINKNO = 1;

DMA0->TCD[2].DLAST_SGA = 0;

DMA0->TCD[2].BITER_ELINKNO = 1;

DMA0->TCD[2].CSR |= DMA_CSR_DREQ_MASK;

...

DMA0->SERQ = 2U;

... (Below inside while loop)

if (Count < Timer)

{

Count++;

}

else

{

Count = 0;

DMA0->SERQ = 2U;

}

Outcomes