MPC5777M-512DS and 3V3 I/OS

[nicolasmarti]

Hi,

We currently fail to set the evaluation board in full 3.3 volts. It appears that when we place the J9 jumper on 3.3_SR, the chip is not responding anymore. The other 3.3V configuration (JTAG, EBI...) don't crash the IC, but this only one do.

Can you help to configure correctly the board in full 3.3 volts ?

Regards

[davidmarinheiro]

Hi,

Thanks for your answer, it's clear for the demoboard 512DS, we can modifiy this parameter.

But how can we change this parameter in a board which is powered in 3,3V by default?

Do you know if a Lauterbach tool can bypass the UTEST or not take account the errors detected during UTEST ?

Thanks

[davidtosenovjan]

Jumper J9 selects whether VDD_HV_IO_MAIN rail is connected to 5 or 3.3V.

Several information taken from datasheet:

“The device supports both 3.3 V and 5 V nominal I/O voltages. In order to use 3.3 V on the VDD_HV_IO_MAIN0 physical I/O segment, the HV supply low voltage monitor (VLVD400) must be disabled by DCF client. All other physical I/O segments are unaffected by the LVD400.”

“VDD_HV_PMC only available in the 416 BGA package. PMC supply is shorted to VDD_HV_IO_MAIN in the 512 BGA, with an external bypass capacitor connected to the VDD_HV_PMC_BYP ball. The flash read and P/E current, and PMC current apply to VDD_HV_IO_MAIN for the 512 BGA.”

“Flash read operation is supported for a minimum VDD_HV_PMC value of 3.15 V. Flash read, program, and erase operations are supported for a minimum VDD_HV_PMC value of 3.5 V.”

Thus I would say VDD_HV_IO_MAIN connected to 3.3V implicates flash memory used only in read-only mode in case DCF records are modified prior suppling by 3.3V.

Programming of DCF records is not simple task but it is documented in following application note:

http://www.nxp.com/files/microcontrollers/doc/app_note/AN5131.pdf