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VPU Decoding core clock setting in i.MX515

Question asked by ko-hey on Nov 14, 2016
Latest reply on Nov 24, 2016 by ko-hey

Hi all


I plan to use VPU of i.MX515.

So I read MCIMX51RM Rev. 1 2/2010 but I can't find how to set a decoding core clock domain (cclk).


I know the decoding core clock comes from the CCM module because I found the following description in section 61.2.1.

All VPU input clock and reset sources come from the i.MX51 CCM module. The VPU does not do clock gating internally.


However, I can't understand which register do I set.



Could you specify which register do I set to use VPU ?



According to the section 61.4.2 of RM, the decoding core clock domain's frequency can scale done through the VPU API.

I can't find the API in L2.6.35_10.11.01_ER_docs/doc/mx5/i.MX5x_Linux_VPU_API.pdf.


Which VPU API can set the core clock frequency ?