Hi,
here are some questions about MPC5746R
1.First,I don't need the lock-step core in my project,I will use core 0 to control PMSM,core 1 for the communications and Logic Controls,Can be achieved?;
2.How to exchange datas between the core0 and core1?
3.I need to use ETPU to implement the FLEXPWM function,could you tell me how to use eTPU?
4.How to use the FEC modules,are there some demo codes for me?I want to use the FEC to update my code for each core.
5.Can we use the LFAST to communicate with other CPUs(like FPGA),just like a common LVDS?
6.I found only 2 example codes on the web,could you provide more?
My project is very urgent,looking forward to your reply,thanks very much!
a engineer from CRRC,CHINA.
Hi,
1. Yes.
2. The SRAM memory is shared, so both cores can access whole SRAM. It is just a matter of software. You can use semaphores for coherent data access.
4. Currently there's no example written directly for MPC5746R, but this application note can be used because the FEC module is compatible:
http://www.nxp.com/files/32bit/doc/app_note/AN4577.pdf
http://www.nxp.com/files/32bit/doc/app_note/AN4577SW.zip
Second option is to use Autosar/MCAL drivers (commercial software).
5. Take a look at:
https://www.nxp.com/webapp/Download?colCode=FTF-AUT-F0240
and
http://www.nxp.com/files/microcontrollers/doc/app_note/AN5134.pdf
http://www.nxp.com/files/microcontrollers/doc/app_note/AN5134SW.zip
6. Currently there's no more examples written directly for this device, but a lot of code for MPC57xx can be re-used from these examples:
https://community.nxp.com/docs/DOC-329623
Regards,
Lukas