KL05Z4 issue when setting interrupt priority with Processor expert

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KL05Z4 issue when setting interrupt priority with Processor expert

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srdjanstokic
Contributor II

Hello,

When I try to set interrupt priority PORTB interrupt priority set to 3 (lowest), following piece of code is generated in Cpu.c:

NVIC_IPR7 = (uint32_t)((NVIC_IPR7 & (uint32_t)~(uint32_t)(
               NVIC_IP_PRI_31(0x3F) |
               NVIC_IP_PRI_30(0x7F)
              )) | (uint32_t)(
               NVIC_IP_PRI_31(0xC0) |
               NVIC_IP_PRI_30(0x80)
              ));

this basically means that the value of the register should be written as 0xC0800000 but the NVIC_IP_PRI_31 macro is incorrectly defined in MKL05Z4.h as:

#define NVIC_IP_PRI_31_MASK                      0xC0000000u
#define NVIC_IP_PRI_31_SHIFT                     30
#define NVIC_IP_PRI_31(x)                        (((uint32_t)(((uint32_t)(x))<<NVIC_IP_PRI_31_SHIFT))&NVIC_IP_PRI_31_MASK)

 

Basically, it shifts the value left by 30 instead of 24 bits. This produces an incorrect value in the NVIC registers, and the interrupt priority is not set properly.

The issue is that either the value that is passed to the macro should be 0x03 instead of 0xC0, or the macro shift should be 24 instead of 30.

Is this a known bug in the processor expert?

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marek_neuzil
NXP Employee
NXP Employee

Hello,

Thank you for reporting of this issue. I have been able to reproduce it and I have reported this issue to the responsible development team. They will fix it in a next release.

In the meantime, use the workaround you have described above (modification of the NVIC_IP_PRI_31_SHIFT macro value in the MKL05Z4.h file), please.

 

Best Regards,

Marek Neuzil

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3 Replies
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srdjanstokic
Contributor II

egoodii  I understand how priorities in ARM cores work, but I'm trying to say that in the aforementioned example when I try to set priority 3 to a PORTB interrupt, Processor Expert pre-shifts the priority level up by 6 bits and generates C0.

Afterward, this number is passed to a macro NVIC_IP_PRI_31(0xC0), it gets upshifted again by 30 bits.

This produces 0x30 0000 0000 which is clearly incorrect.

The correct way would be to do NVIC_IP_PRI_31(0x03), which when upshifted would produce 0xC000 0000 which is a correct value (top 2 bits are set). I don't know why is PE doing this pre-shifting, but the resulting code is just invalid. It should leave the set value as-is and pass this to a Macro without doing the shifting.

Alternatively the shift value in the macro should be changed from 30 to 24.

I did a quick test and generated a PE project for KL02Z8, which is an identical ARM M0 core, and the value in the MKL02Z08.h file is:

#define NVIC_IP_PRI_31_SHIFT                     24

So it's definitely only a problem with MKL05Z4.h file.  I'll try to report this to PE guys somehow.

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marek_neuzil
NXP Employee
NXP Employee

Hello,

Thank you for reporting of this issue. I have been able to reproduce it and I have reported this issue to the responsible development team. They will fix it in a next release.

In the meantime, use the workaround you have described above (modification of the NVIC_IP_PRI_31_SHIFT macro value in the MKL05Z4.h file), please.

 

Best Regards,

Marek Neuzil

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Lukas_Heczko
NXP Employee
NXP Employee

Hi,

Maybe it can help you that you can fix the wrong bit position in the header file permanently in your installation:

  • If you are using Processor Expert project without SDK, you can find the header file in {KDS 3.2.0}\eclipse\ProcessorExpert\lib\Kinetis\iofiles\MKL05Z4.h
  • If you are using Processor Expert project with SDK 1.3, you can find the header files in {SDK 1.3}\platform\devices\MKL05Z4\include\MKL05Z4.h

After you change the file, new projects will use fixed header. For exisitng projects, if you use linked project mode then you need only to refresh your workspace to update the file or in case of standalone project mode you have to regenerate the project to update the header.

 

Regards,

Lukas

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