When I try to set interrupt priority PORTB interrupt priority set to 3 (lowest), following piece of code is generated in Cpu.c:
NVIC_IPR7 = (uint32_t)((NVIC_IPR7 & (uint32_t)~(uint32_t)(
)) | (uint32_t)(
this basically means that the value of the register should be written as 0xC0800000 but the NVIC_IP_PRI_31 macro is incorrectly defined in MKL05Z4.h as:
#define NVIC_IP_PRI_31_MASK 0xC0000000u
#define NVIC_IP_PRI_31_SHIFT 30
#define NVIC_IP_PRI_31(x) (((uint32_t)(((uint32_t)(x))<<NVIC_IP_PRI_31_SHIFT))&NVIC_IP_PRI_31_MASK)
Basically, it shifts the value left by 30 instead of 24 bits. This produces an incorrect value in the NVIC registers, and the interrupt priority is not set properly.
The issue is that either the value that is passed to the macro should be 0x03 instead of 0xC0, or the macro shift should be 24 instead of 30.
Is this a known bug in the processor expert?