The Freescale P2040 QorIQ chip has a built-in RNG which contains PRNG and TRNG. As per SEC4.2 Reference Manual, The TRNG consists of two entropy sources (free running oscillators), each of which provides a single bit of output. Concatenated together, these 2 output bits are expected to provide 1 bit of entropy every 100 clock cycles.
During seed generation, the RNG adds entropy generated in the TRNG to the RNG XKEY Register which is 256 bits long. If I directly use these 256 bits as entropy source then can I claim entropy of 256 bits ?