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Why in some output pads of the DDR like address or clock has a ODT field?

Question asked by Diego Perez on Nov 7, 2016
Latest reply on Nov 7, 2016 by Yuri Muhin

Hi,

 

Why in some output pads of the DDR like address or clock has a ODT field?

I think the ODT is asserted on the read side, in data lines is asserted by imx when read data and asserted by DDR device when imx is writing to DDR device. Therefore, I don’t understand why the field ODT is present, for instance, in IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR02 pad control register.

I think the outputs are managed only by DSE in order to mantain SI compatibility.

 

best regards.

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