Hi everyone this is Santhosh.
I was a hardware designer and currently working on MPC8309 PROCESSOR. When I was going through the HARDWARE DESIGN CHECKLIST of MPC8309 I have noticed one thing that in order to interface a parallel flash of NOR type the address line LA is normally not required if the device data width is 16 bits.
My questions are:
1.What is the relation between the address lines and data bus width?
2.Why the address line LA in MPC8309 has to be connected to A of NOR FLASH ? Is this related to ENDIANNESS? If so please explain