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PARALLEL FLASH INTERFACING IN MPC8309TOWER BOARD

Question asked by santhosh munagala on Nov 1, 2016
Latest reply on Nov 4, 2016 by santhosh munagala

Hi everyone this is Santhosh. 

I was a hardware designer and currently working on MPC8309 PROCESSOR. When I was going through the HARDWARE DESIGN CHECKLIST of MPC8309 I have noticed one thing that in order to interface a parallel flash of NOR type the address line LA[25] is normally not required if the device data width is 16 bits.

My questions are:

   1.What is the relation between the address lines and data bus width?

   2.Why the address line LA[24] in MPC8309 has to be connected to A[0] of NOR FLASH ? Is this related to                    ENDIANNESS? If so please explain

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