Anti-collision and ATQA in ISO14443A-3

[mahmoudhosseini]

Edit:

based on the below picture as you can see ,in ISO 14443-3 when we send REQA command to the PCD,all PICC in the reading field will answer with their ATQR. If PCD receives more than ATQR ,this will interpreted to There are more than 1 PICC in the field and PCD must perform anti-collision loop to select right PICC.

I test this with mifare classic PICC and there are no differences when there are a PICC in the field or there are multi,all times ATRQ= 0x0004 will recieved. (I send REQA command in 100 ms periods)

My question is how PCD received multi ATQR? Are they received in turn and continuously? If yes then how they synchronous to determine which one must send ATRQ first? and why I only received one ATRQ when there are multi PICC in the field? 2- Also ISO 14443-3 described coding format of the ATQA that b1~b5 bits are used for bit frame anti-collision ,is this a random value or its depend on each PICC family or ?

[patricio]

Hello Mahmoud,

I have exactly the same doubts. I need to develop the anticollision loop when a Mifare Clasicc 1K  and Mifare Desfiere are approached at the same time to the antenna. 

I found very helpfull example in the Anex A of the application note "MO18412 Type Identification Procedure" where it explains the anticollision procedure.

I work with the MFRC522, and I could find that the registers 'ComIrqReg' and 'ErrReg' offers the appropiate information in bit3 'CollErr' when a collision is detected. 

So, I thouth that two conditions were necesary a collision to be detected:

   1.- When more than one card are in collision, the PCD will receive the OR value of all ATQAs.

   2.- The bit  'CollErr' in 'ErrReg' should be set to 1 as well as the bit 'ErrIRq' in 'CommIrqReg'.

The point is that only sometimes this two conditions are met, and sometimes not. 

Mahmoud, did you get a solution to your enquire?  I would appreciate if you could give me a clue.

BR.

Aitor.