SWD additional pullup/pulldown resistor when the GPIO already has one

[oliviermartin]

I might have more chance for my question in a new thread. The question was initially raised by IanB in this message: https://community.nxp.com/message/752591?commentID=752591#comment-752591 :

Unlike Mike, I'm using a device which shares its serial wire pins with GPIO. If the pull-up is enabled in IOCON as its default condition out of reset, doesn't it have a pull-up? Could you please clarify.

I had the same question myself and found this answer in Design Consideration for Debug https://community.nxp.com/thread/388998 :

Some MCUs do not include internal pull-up or pull-down resistors on JTAG/SWD pins. You  will need to review the datasheet for the specific MCU being used to confirm. Where internal resistors are not provided, these should be added externally onto your board as detailed above. You may use resistors between 10K and 100K for these signals. This will prevent the signals from floating when they are not connected to anything. Failure to do this will lead to, at best, unreliable debug connections, or more likely no ability to debug at all.

If an internal resistor is provided for a pin by the MCU, then an external resistor  is not required for that pin. But if external resistor is provided in such cases, then it must match that provided internally by the MCU.

But later on, I found in the LPC11U6x User Manual and Data sheet that SWDIO and SWCLK pins have an internal pull-up for SWDIO and pull-down for SWCLK by default. But both documents contain a diagram that shows the recommendation to add a pull-up and pull-down resistors. And the value of these resistors do not necessary match the internal MCU...

So what should we do for LPC11U6x?

[simonwyss]

Similar problem with the LPC54102 (LPC5410x Series)
Datasheet page 76: (use external pull-down on SWCLK)

User Manual  UM10850 of LPC5410x: (internal pull-up on SWCLK)

This two documents clearly conflict each other!

The datasheet recommends to use a pull-down on the SWCLK while the user manual states that there is an internal pull-up.

This leads to higher standby currents due to the two opposite resistors on the SWCLK!

[hmyoong]

This is my understanding based on all the information available.

[ianbenton]

Yes  - its quite clearly nonsense, but NXP won't admit it! I do note that the pull-down resistor has been left of the connection diagram in later device (LPC15xx, for instance).

It's worse than just the current through the resistors: if one happens to choose a pull-down which is the same value as the internal pull-up, the the inputs transistors are both biassed on, and current flows through them - much more current than flows through the resistors; and the noise-immunity on the pin is completely destroyed.

[jeremyzhou]

Hi Olivier Martin ,

1. If the pull-up is enabled in IOCON as its default condition out of reset, doesn't it have a pull-up?

    Yes.

2. Yes, it's recommended to add an external resistor to the WDIO and SWCLK pins when design the debug interface.
Have a great day,
Ping

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