AnsweredAssumed Answered

T1024 LBC Mapping Issue

Question asked by Ram Krishnan on Nov 1, 2016
Latest reply on Nov 7, 2016 by Ram Krishnan

I am trying to map devices attached to the CS2 using GPCM in the DTS file. But it looks like the fsl_lbc.h file is mis-matched with the register addresses in the T1024 Reference Manual. 

 

In the DTB I mapped the fpga using 

fpga@2,0 {
compatible = "fsl,elbc-gpcm-uio";
reg = <0x2 0x0 0x100>;
elbc-gpcm-br = <0xa0000105>;
elbc-gpcm-or = <0x00000000>;

};

 

I am trying to map it to a uio for reading memory mapped registers. Range 2 is defined as 0xA0000000 and it is mapped to Chip Select 2. If I do a md.w on the uboot it works fine. 

 

But if I try to use the dtb to initialize the uio for this device it gives an error saying "fsl,elbc-gpcm-uio fa0000000.fpga: address mask / size mismatch" .  I checked the code and put in printk in various places and saw that the bitmasks and other field values in fsl_lbc.h is mismatched witht he T1024RM. For eg the BA in CSPR2 is defined as a 16 bit field but in the file it is defined as a 17 bit mask. The MSEL is defined as a 2 bit field in the T1024M at the 23rd bit offset while in the file it is defined as a 3 bit mask 0xE0.  I am using SDK 2.0 which is the latest one. Is this file outdated or am I looking at a wrong approach to memory mapped uio. 

 

These are from the fsl.lbc.h file. 

 

#define BR_BA 0xFFFF8000
#define BR_BA_SHIFT 15

 

 

 

Thank you,

Ram Krishnan

Outcomes