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eMMC4.4/4.41 (Dual Data Rate) AC Timing of i.MX6DL

Question asked by Zongbiao Liao on Oct 31, 2016
Latest reply on Nov 1, 2016 by Zongbiao Liao

Hello Community


Figure 41. eMMC4.4/4.41 Timing and Table 52. eMMC4.4/4.41 Interface Timing Specification in IMX6SDLAEC(Rev.7) describe the AC timing of eMMC4.4/4.41 DDR mode.

But it has no information about Clock Low Time and Clock High Time like Table 53. SDR50/SDR104 Interface Timing Specification.


So could you offer me Clock Low Time and Clock High Time information of eMMC4.4/4.41 (Dual Data Rate) AC Timing?


Thank you!