Customer asks about Kinetis L series with 16 bit ADC: A lot of the literature I see is about the impedance presented to the front end of the (capacitive SAR) ADC. But I think what really happens is a charge transfer from the source storage cap to the ADC

[steve_fae]

Customer writes:

Regarding 16 bit ADC, charge distribution. A lot of the literature I see is about the impedance presented to the front end of the (capacitive SAR) ADC. But I think what really happens is a charge transfer from the source storage cap to the ADC input sampling cap. It's always modeled as Z but to me this is a time-domain problem, and one I no longer understand.

All of our sources (things we want the ADC to measure) have a 0.1uF cap. That's several orders of magnitude greater than the ADC sampling cap. It would seem to me that, regardless of the source impedance (several k), there is sufficient coulomb storage.  Is there an APP that addresses or discusses this further?

[xiangjun_rong]

Hi, Steven,

I think the an4373.pdf is helpful to understand the charging between external capicitor and capicitor of S/H.

Hope it can help you.

BR

XiangJun Rong