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SPI clock issue

Question asked by mkdomenico on Oct 26, 2016
Latest reply on Oct 27, 2016 by Petr Stancik

Hello community,

 

I am trying to implement the SPI module on the S32K144 RevA on a demonstration board. My program loops back MOSI on MISO, sending a number over SPI, which is incremented on reception, and sent again. When this number reaches an arbitrary high (20 000), the red LED is toggled and the number is reset (to 0). In pseudo-code:

 

myNumber = 0

while(1)

   send over SPI(myNumber)

   wait for reception()

   receivedNumber = read from SPI()

   if receivedNumber == 20000

      toggle LED

      myNumber = 0

   else

      increment received number

      assign received number to myNumber

endif

The LED toggling frequency should therefore be directly proportional (or at least, linked) to the SPI frequency. Here is where I cease to understand what is happening:

 

  • When the SPLL_DIV is set to 16MHz and the core clock divided by DIVCORE is set to 32 MHz, the SPI bit period is roughly 250ns, causing the LED to toggle four times a second.

 

  • When the SPLL_DIV is set to 16MHz and the core clock divided by DIVCORE is set to 16 MHz, the SPI bit period is roughly 250ns, causing the LED to toggle twice a second.

 

  • When the SPLL_DIV is set to 32MHz and the core clock divided by DIVCORE is set to 32 MHz, the SPI bit period is roughly 125ns, causing the LED to toggle four times a second.

 

 

  • When the SPLL_DIV is set to 32MHz and the core clock divided by DIVCORE is set to 16 MHz, the SPI bit period is roughly 125ns, causing the LED to toggle twice a second.

 

 

I do not understand why the SPI CLK/bit frequency is seemingly not linked to the LED toggling frequency. (which should be linked to the SPI transmission speed, i.e. SPI CLK frequency)

 

Could you please help me understand this?

 

Thanks in advance,

 

Domenico

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