Our custmer has question below.
The pcie_clk_root could be output from CCM_CLKO2 by setting of CCM_CCOSR register by i.MX6S.
But i.MX6D and iMX6DP are instead of pcie_clk_root in 125M_clk_root.
When the setting of PCIE_AXI_CLK_ROOT is changed, 125M_clk_root also seems to be the same frequency.
Are PCIE_AXI_CLK_ROOT and 125M_clk_root the same one?