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SDMA to EIM fpga test on 6sl linux 3.0.35

Question asked by jayakumar2 on Oct 21, 2016
Latest reply on Oct 27, 2016 by rui guo

Hi,

I'm using a 6sl board with linux 3.0.35. I have an FPGA connected via EIM using CS1. I'm able to talk to the FPGA using regular host memory read/writes using mmap of /dev/mem physical address 0x0C00_0000 (CS1). I see the 6sl generate the expected EIM cs1 and read/write cycles. So that part is working fine and I'm very happy with that.

 

So I would like to progress to using SDMA to improve performance. I have been experimenting using drivers/char/mxc_sdma_memcopy_test.c. In particular, I'd like to get host-to-fpga DMA (memory to device transfer) working. So I followed the example code and tried to modify it as follows:

 

init_completion(&dma_m2m_ok);

dma_cap_zero(dma_m2m_mask);
dma_cap_set(DMA_SLAVE, dma_m2m_mask);
m2m_dma_data.peripheral_type = IMX_DMATYPE_MEMORY;

 

I chose IMX_DMATYPE_MEMORY since I believe host memory to EIM memory target is memory type transaction. I have not tried other options like IMX_DMATYPE_EXT , IMX_DMATYPE_FIFO_MEMORY since I'm not sure they apply. Please let me know if I should try those.

 

m2m_dma_data.priority = DMA_PRIO_HIGH;

dma_m2m_chan = dma_request_channel(dma_m2m_mask, dma_m2m_filter, &m2m_dma_data);

 

wbuf = kzalloc(SDMA_BUF_SIZE, GFP_DMA);

 

dma_m2m_config.direction = DMA_MEM_TO_DEV;
dma_m2m_config.dst_addr = 0x0C000000;
dma_m2m_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
dmaengine_slave_config(dma_m2m_chan, &dma_m2m_config);

sg_init_table(sg, 1);

sg_set_buf(&sg[0], wbuf, SDMA_BUF_SIZE);

ret = dma_map_sg(NULL, sg, 1, dma_m2m_config.direction);

dma_m2m_desc = dma_m2m_chan->device->device_prep_slave_sg(dma_m2m_chan,sg, 1, dma_m2m_config.direction, DMA_TO_DEVICE);

dma_m2m_desc->callback = dma_m2m_callback;

dmaengine_submit(dma_m2m_desc);

wait_for_completion(&dma_m2m_ok);
dma_unmap_sg(NULL, sg, 1, dma_m2m_config.direction);

 

In above, I hardcoded dst_addr as 0x0C00_0000 because that's the physical address for the EIM CS1 target. When I try this, the sequence seems to execute as expected (completion seen as shown by debug output below) but on the EIM bus I do not see CS1 assert or any activity occur. That's the part I have not been able to figure out. I'm not able to get any activity out on the EIM bus using SDMA.

 

sdma_write:235 submitting for dma
sdma_write:238 waiting for completion
in dma_m2m_callback
sdma_write:278 count=2

 

Full source of the test is attached.

 

I am hoping to find a working example of SDMA host memory to EIM for 6sl 3.0.35 (or similar). If anyone has any debug suggestions or advice, I'd be very grateful!

 

Thanks!

Original Attachment has been moved to: mxc_sdma_memcopy_test.c.zip

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