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LPC4357 I2C Problems when APB is clock via IRC

Question asked by Ronny Friedrich on Oct 13, 2016
Latest reply on Nov 11, 2016 by Ronny Friedrich

I´m using the I2C driver for LPC4357 provided by Keil until now without any problems until now.
The driver re-configures the APB clock source to use PLL1 when the peripheral is enabled:


 /* Connect base clock */
    *i2c->base_clk_reg = (1    << 11) |     /* Autoblock En               */
                         (0x09 << 24) ;     /* PLL1 is APB  clock source  */


However, for my current project I need to clock both APB1 and APB3 from the internal IRC oscillator

running at 12 MHz. When I change the driver to use IRC for APB:

 /* Connect base clock */
*i2c->base_clk_reg = (1    << 11) |     /* Autoblock En               */
                      (0x01 << 24) ;     /* IRC is APB  clock source  */


the I2C data register seems to be frozen at 0x00. The signals at SDA/SCL are still OK, it seems sending is still working as expected and after each transfer a "NACK" status is set, only the receiver seems to be dead.


When I comment out the above code completly to use the previous APB clock settings (which are IRC + Autoblock=Enabled) the behaviour is exactly the same.


When the APB clock source is changed to use one of the IDIVx integer dividers I2C seems to work for higher input frequencies above approx. 40 MHz. Below that the data register seems to receive random values and below ~25 MHz the register freezes to 0x00.


The M4 core is clocked via XTAL/PLL1 running at 204MHz, M0 core is not in use. Also, I do not use any power saving modes or dynamic clock changes. The i2c problems do not depend on SCL frequency, I tried 10kHz, 100kHz and 400kHz with exactly the same results.


Neither the datasheet nor the LPC4357 errata mention some issues related to low I2C peripheral clocks. 


-> Is there any (not yet documented) constraint about the I2C peripheral clock I missed?

-> Has anybody else experienced problems with I2C on LPC4357 when clocking APB via IRC?