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SSP Slave Transfer on Interrupt

Question asked by James Massey on Oct 12, 2016
Latest reply on Oct 18, 2016 by James Massey



I have an 8 channel ADC which has the following output:


There is a continuous SCLK at 4MHz, though there is only a burst of 32 bytes of data once per ms.

Once per ms, a DataReady line goes inactive for one SCLK cycle (250ns) and then returns to active. Unfortunately, it stays active after the data is transmit.

When DataReady goes active, SCLK goes high, transferring first bit onto bus. This bit needs to be sampled when SCLK goes low 125ns later.


Is there a way to capture this data directly with an LPC1769?


If I try to use an interrupt on the DataReady signal to begin a DMA transfer, I cannot get the transfer started in time as it takes almost 2us to get the interrupt going and the first bit needs to be sampled 125ns after the DataReady goes active.


If I try to run the DataReady signal into the SSEL pin, and set the DMA transfer up each time I get new data, it runs more or less continuously because the SSEL signal is staying low after the data is transmitted.


Is there some way to set up a DMA transfer based on the falling edge of the SSEL pin instead of the level of that pin so that it only happens once each time the SSEL goes up and down? Or is there a way to get the DMA transfer started fast enough to get the first bit within 125ns?


Thanks for any insight - James