Hello iMX community.
I have a question about connecting dual die LPDDR2(MT42L256M32D2LG-18 WT:A Single Channel Dual Rank) to the iMX6 (MCIMX6Q6AVT10AD). It appears that I do not have sufficient CLK_EN and CS lines to make this configuration work. Is there a way to configure extra clock enable and chip select lines on the iMX6?
Each chip contains dual 4Gb die, so in total if I can make this work, I will end up with 2GB.