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MC9S08AC60 SPI Master - how best to flush out old Rcv Data on Master?

Question asked by Michael Fugere on Oct 10, 2016

I'm porting over some (bad) legacy code and encountering problems where occasionally the SPI1D receive buffer on the Master contains (old) bytes from a previous Slave data transfer, which then ends up going into the beginning of the next received data buffer on the Master.  Which bits can I use in the SPI control registers to effectively clear out (either all 0s or all Fs) content of the SPI1D receive register and its double buffer to ensure that the first bytes of a subsequent transfer are not old/leftover bytes?    I normally send formatted data packets for this stuff, but to do so will require even more upset to the legacy code, which had been running (more or less) on MC908GP32 devices.

Thank you