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LS1021A  PCIe Link speed is Gen1 (2.5GB) not Gen2 (5GB)

Question asked by Tarek El-Sherbiny on Oct 6, 2016

We are testing the PCIe link between the SoC and FPGA on our own board.

 

The FPGA is programmed to support link Gen2x4 (5GB)  speed which should be supported by the LS1021A SoC.

However the PCIe link is trained at Gen1x4 (2.5GB).

 

I have dumped the Capability register (0x340007C) and the maximum link speed is set to 2.5G

~ devmem 0x340007c

0x0073F421

 

When I forced the value to be 5G and rescanned PCI bus the link speed is corrected to 5G.

 

Can you please let me know why the link speed is 2.5G by default and what is the proper method to set the value to 5G?

 

 

This is the information from lspci –vv

 

00:00.0 PCI bridge: Freescale Semiconductor Inc Device 0e0b (rev 20) (prog-if 00 [Normal decode])

        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-

        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

        Latency: 0, Cache Line Size: 64 bytes

        Interrupt: pin A routed to IRQ 43

        Region 0: Memory at 4044000000 (32-bit, non-prefetchable) [size=16M]

        Region 1: Memory at 4040000000 (32-bit, non-prefetchable) [size=64M]

        Bus: primary=00, secondary=01, subordinate=01, sec-latency=0

        Memory behind bridge: 46000000-460fffff

        Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-

        Expansion ROM at 4045000000 [disabled] [size=16M]

        BridgeCtl: Parity+ SERR- NoISA- VGA- MAbort- >Reset- FastB2B-

                PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

        Capabilities: [40] Power Management version 3

                Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)

                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

        Capabilities: [50] MSI: Enable- Count=1/16 Maskable- 64bit+

                Address: 0000000000000000  Data: 0000

        Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00

                DevCap: MaxPayload 256 bytes, PhantFunc 0

                        ExtTag- RBE+

                DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+

                        RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+

                        MaxPayload 128 bytes, MaxReadReq 512 bytes

                DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

                LnkCap: Port #0, Speed 2.5GT/s, Width x2, ASPM L0s, Exit Latency L0s unlimited, L1 unlimited

                        ClockPM- Surprise- LLActRep+ BwNot+ ASPMOptComp+

                LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- CommClk+

                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

                LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-

                RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-

                RootCap: CRSVisible-

                RootSta: PME ReqID 0000, PMEStatus- PMEPending-

                DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd-

                DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-

                LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-

                         Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

                         Compliance De-emphasis: -6dB

                LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

                         EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

        Capabilities: [100 v2] Advanced Error Reporting

                UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-

                UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-

                UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-

                CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-

                CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+

                AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-

        Capabilities: [148 v1] #19

        Kernel driver in use: pcieport

 

01:00.0 Non-VGA unclassified device: Endpoint Device

        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-

        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

        Latency: 0, Cache Line Size: 64 bytes

        Interrupt: pin A routed to IRQ 43

        Region 0: Memory at 09000000 (32-bit, non-prefetchable) [size=64K]

        Region 1: Memory at 09010000 (32-bit, non-prefetchable) [size=64K]

        Region 2: Memory at 09020000 (32-bit, non-prefetchable) [size=64K]

        Region 3: Memory at 09030000 (32-bit, non-prefetchable) [size=64K]

        Region 4: Memory at 09040000 (32-bit, non-prefetchable) [size=64K]

        Region 5: Memory at 09050000 (32-bit, non-prefetchable) [size=64K]

        Capabilities: [50] MSI: Enable- Count=1/4 Maskable- 64bit+

                Address: 0000000000000000  Data: 0000

        Capabilities: [68] MSI-X: Enable- Count=9 Masked-

                Vector table: BAR=0 offset=00001000

                PBA: BAR=0 offset=00002000

        Capabilities: [78] Power Management version 3

                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

        Capabilities: [80] Express (v2) Endpoint, MSI 00

                DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <1us, L1 <1us

                        ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

                DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

                        RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+

                        MaxPayload 128 bytes, MaxReadReq 512 bytes

                DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

                LnkCap: Port #1, Speed 5GT/s, Width x4, ASPM not supported, Exit Latency L0s <4us, L1 <1us

                        ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+

                LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+

                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

                LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

                DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported

                DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled

                LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-

                         Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

                         Compliance De-emphasis: -6dB

                LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

                         EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

        Capabilities: [100 v1] Virtual Channel

                Caps:   LPEVC=0 RefClk=100ns PATEntryBits=1

                Arb:    Fixed- WRR32- WRR64- WRR128-

                Ctrl:   ArbSelect=Fixed

                Status: InProgress-

                VC0:    Caps:   PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-

                        Arb:    Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-

                        Ctrl:   Enable+ ID=0 ArbSelect=Fixed TC/VC=ff

                        Status: NegoPending- InProgress-

        Capabilities: [200 v1] Vendor Specific Information: ID=0000 Rev=0 Len=044 <?>

        Capabilities: [800 v1] Advanced Error Reporting

                UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-

                UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-

                UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-

                CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-

                CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+

                AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap+ ChkEn-

 

 

Best Regards,

Outcomes