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MCF5484 branch/instruction cache coherency problem

Question asked by Achim Daub on Oct 6, 2016
Latest reply on Oct 7, 2016 by Achim Daub

I think i have a coherency problem that i can not fully understand.


At startup our application is running directly from the flash. While running from flash the instruction and branch cache are enabled to speed up the booting stage.

After enabling the caches we perform a ram test that is writing and reading from every ram location of our external sdram (data cache is not enabled).

Then the external sdram is "initialized" to run our code from there. First the bss section is set to zero then the code is copied from flash to ram.

Directly after the exectution from flash is finished with calling the first function in the external sdram. At that point an illegal instruction excpetion occurs.


Debugging the code shows no illegal instruction at the first statement in the external ram. In fact the ram content is exactly as it should be.

When i change the pattern of the ram test to a valid statement (branch to the same address or rts), the program behaves as if the pattern is executed. So i guess that somehow the branch or instruction cache is holding information about the memory content that is present after executing the ram test but before the code copy took place. Could this be possible somehow?


Our code looks like this:




  // Init stuff






  // until here every statement is executed in the flash




RamTest, InitBss and CopyCode are basically read/write loops over the external ram.


Additionally if i add a hardware breakpoint the exception does not occur.