AnsweredAssumed Answered

Hard fault when setting USB0_CTL |= ODDRST on K60F

Question asked by Daniel Caetano on Sep 22, 2016



I'm trying to use the FSL_USB_Stack on Kinetis MK60FN1 both on the TWR module and on a custom board. When initializing the registers for USB I get a CPU Hard Fault on the instruction USB0_CTL |= USB_CTL_ODDRST_MASK;


I tried debugging on Instruction stepping mode and the fault occurs on the instruction ldrb.w r2, which is as seen below.


00002e50: ldr r3, [pc, #320] ; (0x2f94 <USB0_Init+384>)
00002e52: ldr r2, [pc, #320] ; (0x2f94 <USB0_Init+384>)
00002e54: ldrb.w r2, [r2, #148] ; 0x94                                    <- this one
00002e58: uxtb r2, r2
00002e5a: orr.w r2, r2, #2
00002e5e: uxtb r2, r2
00002e60: strb.w r2, [r3, #148] ; 0x94


The value of r2 right before execution is 0x40072000, which is the base address for the USB registers. 0x94 is the correct offset to access the USBx_CTL registers.


Can anyone shed some light on what might be causing this issue?

The project files are attached and, as you can see, I already tried writing into that register in another ways, unsuccessfully.


Thanks in advance,


Daniel Caetano