I2C-bus timing

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I2C-bus timing

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mikaelstolt
Contributor I

Hi,

we are using the I2C1 interface of  LPC1769 in an equipment where we have to communicate through some opto-couplers. Since the equipment is designed for hazardous/explosive areas we cannot handle the opto-couplers the way we want, so the link is very slow with big delays from master to slave, and back again.

This complicates things a bit, especially when trying to get the equipment  through EMC test. The signal delays tends to make false start and stop conditions which messes up things.

The question thes is, does anyone know a good way to Control the timing between SCL and SDA pins?

All I can find is how to alter the duty-cykle of the SCL which might be useful.

I cannot find any help from any CPU register so I am stuck with using capacitors on the data-line to improve immunity.

Anyone with a better solution?

Regards

Mike

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mikaelstolt
Contributor I

Hello Sol,

I do appreciate your answer, and I am sorry I am late reacting to it.

It looks like we have to cope with the capacitor solution because, as I see it, your other suggestions is not possible to implement because perhaps I have not given you all parameters.

Our system is a single master system and that takes away a few of your ideas. Since we cannot control the clock-stretching of the slave peripherals, we just have to make sure that the capacitors takes care of the colliding signal flanks even if your idea has merit.

Let me tell you what we did to solve this.

Since we have a lot of pins free on the LPC1769 we actually split the I2C system in two. One part "locally" and one part that talks over the opto-couplers.

On the "opto-branch" we put some capacitors on the data lines (yes one send and one receive line due to a I2C driver on each side of the opto-couplers), and changed the duty-cycle of the SCL to 33/66 % to give the slaves extra time to send a stable data.

This actually increased the immunity by a factor of four! and put us clear of the EMC demands.

Again Sol, thank you.

Regards

Mike

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soledad
NXP Employee
NXP Employee

Hello Mikael,

Let try to add my two cents,  in fact I think the most effective it is the way your are doing with the Capacitors and the transmition lines of the i2c but maybe you can try doing some clock stretching effect.   Here is what it means:

Clock Stretching - I2C Bus 

If you review the User Manual of the device in the page 445 section 19-7-6  You can see how to implement the clock stretching.  Hope it helps.

Have a great day,
Sol

 

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