AnsweredAssumed Answered

Can not clear ECSM.ESR.R1BC

Question asked by Buzdugan Andrei on Sep 20, 2016
Latest reply on Sep 20, 2016 by Buzdugan Andrei

Hello NXP Community,


 I am developing some code to help verify the ECC's HW for RAM. For this I need to use the error injection mechanism and inspect the ESR.R1BC. While I do see that ECC has captured correctly the address and data of the error, (though the symptom bits are way off) and the R1BC is asserted, I can not clear the R1BC.

 I have the following algorithm :





//Generate SEC
array[0] = 0xFFFFFFFF - u8Idx;
readBackData= array[0];




if (ECSM.ESR.R1BC == 0x1)
ECSM.ESR.R1BC = 0x1;

/*Nothing to do.*/


 To be more specifically, I can see the R1BC clear to 0, but after half a second it is put back to 1.I can clear it, if I deactivate the ECC 1-bit RAM reporting. But, later if I re-activate it, the R1BC automically sets (restores more like it) itself. I've looked through the errata, but I didn't find anything similar. This is for SPC5605B. Did anybody else run into this scenario ? if so, is there a way-around ?