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Controlling offset into peripheral memory on T1024

Question asked by Max Ruttenberg on Sep 19, 2016
Latest reply on Sep 21, 2016 by Serguei Podiatchev

Suppose I have a peripheral device (connected with PCIe) that has 32GB of memory on it, and the device wishes to make all 32GB available to Linux. I can see that there's a limitation with the amount of IO memory made available at boot to any given PCI controller (examining /proc/iomem it looks like 256MB). 

 

What's the most effective way of getting around this problem? The T1024RM describes LAWs and ATMUs and my first thought was to try the following:

 

  1. setup an extra LAW for an unused chunk of the memory space
  2. setup an extra outbound window register set with the base address register beginning at this new LAW and then control access into my peripherals address space by editing the translation address registers. 

 

When I try this though, and then attempt to read from the physical address that I had set using the LAW, which is the same value to which I had set the outbound window's base address, I get a bus error. 

 

Is there a step that I am missing here?

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