The iATU configuration as shown by the devicetree programs only 2 outbound regions:
ranges = <
/* downstream I/O */
/*non-prefetchable memory */
I have confirmed this configuration by dumping the iATU registers.
Region1: Base 0x40 0001 0000 ==> Target 0x0000 0000
Region2: Base 0x40 4000 0000 ==> Target 0x4000 0000
So effectively the iATU is translating the 40-bit BAR space physical address to 32-bit PCIe address space which is fine.
My question is why the default configuration only programs the outbound and not the inbound as well?
Is it not expected that the PCIe device will write to this BAR space area at address 0x40 0000 0000?
What is a typical scenario for a PCIe NIC card for example in terms of the inbound/outbound messages?