AnsweredAssumed Answered

B4860 PCIE Access from DSP Core

Question asked by neale buckland on Sep 12, 2016
Latest reply on Jan 23, 2017 by Umair Malik

I am attempting to access a PCIE endpoint connected to a B4860QDS from the a SC3900FP core.

The link is established correctly (as reported by u-boot) and I am able to perform memory writes using u-boot (via the 'mw' command). However, when I try to configure the SC3900FP to allow the same to occur, no activity occurs in my attached end point.


U-boot seems to configure the end point such that the BARs are 0xe1000000, 0xe2000000 and so on. There is a PCIE ATMU set to map 0xe0000000 to 0xc00000000 in the local address space. A LAW is configured for a base address of 0xc00000000 with the target set to PCIE.


If I write to an offset from 0xc00000000, I get a corresponding write in the endpoint at an offset from 0xe0000000. However, if I configure the same settings in the DSP, I don't get any activity in the end point at all.

Is there some additional configuration I need to do? Is the 0xc00000000 arbitrary, or does is have a specific meaning for the e6500 core (where u-boot is running).