Problem using SCI on 9S08GB60 Chip

[Jocelyn]

Hello, I am having a problem with the transmission of data on SCI2 of the 9S08GB60 chip.

My current setup uses the SCI2 Tx and Rx signals for data transmission and a separate I/O signal which indicates a request to send data.

When my request to send data signal goes high (logic 1) then my source code puts a flag byte in the SCI2 Data register to be transmitted.  This should occur every time the request to send data is received.

Unfortunately, this only works for the first request to send data.  When the second request occurs, I can see my code put the flag byte into the SCI2 data register and set the transmission to begin, and I can also see that the transmit complete bit in the status register gets set to a 1, indicating that it has finished sending the byte on the Tx line.

However, when I probe the Tx signal with an oscilloscope, nothing is actually being put out on the bus. 

As I have mentioned this works once just fine, but the second time nothing will get out on the bus at all.  Which results in my request to send data signal never being acknowledged and my whole system locking up.

Is there any reason why the hardware would think that the data had been transmitted, when it in fact had not been?

[peg]

Hello and welcome to the fora, Jocelyn.

This seems quite odd.
If you have not loaded the SCID in a while you should be able to load two successive bytes without waiting.
This is because of the buffer on the main shift register.
Try loading two bytes of data in the first instance and see what you get.
Just do to concecutive byte loads to SCID.

Of course this presumes you have setup the baud clock and enabled Tx!

[Jocelyn]

Peg,

I may have responded too soon.  It seems that now what is being put out on the Tx signal is not what I had put into SCID. 

Since it is not the correct data coming out on the signal, my software on the other end of the stream does not send its response message over. 

Thanks for the advice, at least now I can see some kind of data coming out onto the signal.  Now to get the correct data out.

-Jocelyn

[peg]

Hi Jocelyn,

My suggestion was not intented to make it work but to provide a different stimulus in order to figure out what was going on.
I meant you to load the first then second byte, not the same one twice.
No time to think about it now, maybe later.

[Jocelyn]

Peg,

I must have misunderstood.   However, there is only 1 byte to transfer.  So I would not have any other data to put in for the second byte.

Thanks.

Jocelyn

[Jocelyn]

Peg,

Thanks much for the advice.  I did as you said and it seems to be working much better now.  It still perplexes me as to why I would need to put data into SCID twice for this particular byte of data.  When I send out the previous buffers on Tx, everything works as expected. 

Unfortunately, I am now having an issue getting my response buffer put onto the I2C bus properly.  Same kind of situation, but now for the second response buffer there is an issue getting the whole buffer out on the I2C when the chip is addressed as slave.  I have to run some more tests, but I may be back again for advice.

Thanks again!

-Jocelyn