Hi,
The following code are in "mc9s12zvmc128.h" file .I can't find the define of 7U,0U,8U and so on .I don't know the meaning of it. Who can give me a little hint ?
#define MODRR0_S0L0RR_MASK 7U
#define MODRR0_S0L0RR_BITNUM 0U
#define MODRR0_SCI1RR_MASK 8U
Hi 歌 苏,
Please see MODRR0 Routing Register description in chapter 2.3.2 PIM Registers 0x0200-0x020F in RM.
The MODRR0_S0L0RR_MASK and MODRR0_SCI1RR_MASK are just masks.
So, if you calculate MODRR0 & MODRR0_SCI1RR_MASK it will return SCI1 routing setting to you, despite on other bits in MODRR0 register.
The SCI1 routing options are presented by just one bit - SCI1RR
The SCI0 routing options are presented by three bits - S0L0RR[2..0]
The default SCI0 routing option is 0b000 = 0x00 = 0 (MODRR0_S0L0RR_BITNUM). In that case the SCI0 is internally connected to LINPHY0/HVPHY0.
See Table 2-10. Preferred Interface Configurations for more details.
Note: The MODRR0 register might be written just once in normal mode. So, all settings have to be managed by singe write into this register. For example:
Correct:
MODRR0=0x80; //SCI0 internal, SCI1 to PS2,3, SPI0 to PS2..4, SPI0 SS0 at SP5
Wrong:
MODRR0_S0L0RR = 0x00; //SCI0 internal
MODRR0_ SCI1RR = 1; //SCI1 to PS2,3
MODRR0_SPI0RR = 0; //SPI0 to PS2..4
MODRR0_SPI0SSRR = 0; //SPI0 SS0 at SP5
I hope it helps you.
Have a great day,
Radek
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