S12ZVC Regulator Max Current

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S12ZVC Regulator Max Current

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jinjingyang
NXP Employee
NXP Employee

Dear Sir,

 

According to S12ZVC ref manual rev1.5 page 725 "E.1 VREG Electrical Specifications", the max 5V LDO output current is 70mA or 50mA without external PNP.

What's the difference between the two cases? (both are without external PNP).

 

If using external PNP, what's the typical max current?

If this need customer to evaluate the thermal performance by themselves, do we have any estimates?

 

According register description, external PNP and internal regulator, only one of them can be used?

Can they be turned on at the same time to achieve more current?

 

The problem here is that MCU need 25mA and CAN phy need 50mA. That means S12ZVC cannot provide any more current for external 5V device on the PCB. Even without any external 5V device, if customer need use the 4x25mA + 1x20mA high current output, the S12ZVC is not able to provide enough current?

Thus customer has to add an 5V LDO for this case?

 

Regards,

Jason Yang

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RadekS
NXP Employee
NXP Employee

Hi Jason,

About 70mA or 50mA without external PNP)

The difference is in the temperature range.

The internal voltage regulator is able to provide 70mA only when junction temperature is below 150°C (-40°C < Tj < 150°C).

The voltage regulator performance is limited to 55mA above that temperature (in range -40°C < Tj < 175°C).

 

About external PNP)

The max current is defined mainly by PNP transistor, his gain (beta), power dissipation by transistor package, PCB layout and maximum allowed ambient/junction temperatures.

Please look at our application note AN4867 Hardware Design Guide lines for S12ZVC

http://www.nxp.com/files/microcontrollers/doc/app_note/AN4867.pdf

for more details about static thermal analysis (include an example).

 

About simultaneous use of external PNP and internal regulator)

Only one of the regulators may be used at the same time. By default, both regulators are enabled after reset. The target voltage of external regulator is a bit higher than for internal regulator. So, if external PNP is assembled, the voltage will be driven by them.

After reset, you must configure CPMUVREGCTL register for either internal or external VDDX regulator.

 

About power supply for CAN PHY)

The S12ZVC contains second VDDC regulator which is able to provide the power supply for CAN PHY. Due to thermal limitation, there isn’t option for the internal regulator and you have to use external PNP for that purpose. So, according to your description, the customer will need S12ZVC MCU and two external PNP transistors.

 

You may also look at S12ZVM Power Dissipation Calculator:

https://community.nxp.com/docs/DOC-332232

This tool does not support directly S12ZVC family, but it still may provide some basic overview about a thermal situation.

You may select S12ZVMC256 derivative, simply disable VDDS1, VDDS2, GDU, Charge Pump, Boost Converter, LIN Transceiver and play with other parameters.

I hope it helps you.

Have a great day,
Radek

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jinjingyang
NXP Employee
NXP Employee

Hi,  Radek,

If customer just need 25mA for 5V. Thus there is enough current for CAN phy.

Can they use VDDX to supply VDDC?

Jason Yang

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RadekS
NXP Employee
NXP Employee

Hi Jason,

The MCU itself consumes typically 25~35mA when fBUS=32MHz.

In such case, you have to sum this current together with currents to external loads and current for CAN PHY.

When maximum ambient temperature will be lower than specified 150°C, the internal VDDX regulator may be able to dissipate such energy.

 

However normally we would like to avoid joining the CAN PHY and normal MCU supplies with regard to shorts or backfeeds happening on CAN PHY bus.

 

When we do short the supplies together, the standby regulators are both feeding the common supply node during stop, and it is not quite clear which one is taking the current. Since the VDDC regulator is done only for very low current, Tj has to be very limited once being in stop mode to avoid electromigration.

 

So, we cannot recommend such solution (CAN PHY powered by internal VDDX regulator).

I hope it helps you.

Have a great day,
Radek

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jinjingyang
NXP Employee
NXP Employee

Hi, Radek,

Customer want to reduce cost and minimize the PCB size.

Current design is using one external PNP for VDDX, and then also feed it to VDDC.

According to your comments,

1) Customer's application ambient is lower than 120degC or 105degC. So it's OK for this design.

But I don't know which parameter is the max current for S12ZVC CAN phy in the datasheet.

2) Do you mean there is problem for low power mode? What's the risk here?

In this case the internal VDDC regulator is still used?

Regards,

Jason Yang

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RadekS
NXP Employee
NXP Employee

Hi Jason,

About Q1)

According to RM electric specification, the typical VDDC currents (CAN PHY consumption) are 1.7/3.8mA for recessive/dominant bus state.

However we should add there also currents into bus load. For example: IloadMax = Max Differential Output Voltage/RL = 3V/60Ohm = 50mA.

So, the VDDC regulator has to be able to provide at least 53.8mA (or rather calculate with 60mA as guard band, since max CAN PHY consumption parameter is not specified, only typical values).

On shorts the output current may go up to about 120mA, but not for long. That might just come out of the bypass caps.

 

For power dissipation reasons, you may to apply a reasonable data duty cycle (one part is not always transmitting and secondly only a certain number of bits are dominant) which reduces the power dissipation heavily.

 

About Q2)

Yes there might be a problem in low power mode. In that case, the regulators are in low performance mode. If we connect both VDDX and VDDC regulators together, the regulator which has a (slightly) higher output voltage will take the current because the other one will think the output is already too high and by this will not deliver any current anymore. By this it is not fully clear who is delivering the current and whether the metallization is on par for this mode of operation.

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jinjingyang
NXP Employee
NXP Employee

Hi, Radek,

It's clear for the 1st question now.

For the 2nd question:

Since VDDC use external PNP. I thought VDDC is not working without external PNP.

Do you mean that VDDC use only internal regulator for low power mode?

Why do we need to know which regulator (VDDX or VDDC) is delivering current in low power mode?

Regards,

Jason Yang

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RadekS
NXP Employee
NXP Employee

Hi Jason,

You are right, the VDDC regulator use external PNP, however, there is also internal VDDC regulator which is active in low power mode (where external PNP is not active). Since this regulator is designed as a weak source just for powering CAN PHY in standby mode, the additional load may damage metallization on the chip.

 

Note: Also the VDDX regulator (internal/external) regulator is substituted in low power mode by the internal RPM (reduced performance mode) regulator with limited current capability and voltage accuracy.

I hope it helps you.

Have a great day,
Radek

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