How to enter the state of Deep Power Down mode with i.MX283

[eishishibusawa]

Dear Sir

I want to ask you about i.MX283.

Customer uses the i.MX283 with LP-DDR1(PLD609416B).

I refer to the MCIMX28RM Rev 2, 08/2013.

I think that it needs to be /RAS=High, /CAS=High, /CS=Low, /WE=Low and CKE=Low entering Deep Power Down mode.

Q1.

How can we generate the above state?

(How can we set the LP-DDR1 in Deep Power Down mode with i.MX283?)

Best Regards,

Eishi SHIBUSAWA.

[Yuri]

Hello,

  You may use the procedure, described in section 14.3.2 (Changing Input Clock Frequency)

of the i.MX28 Reference Manual (MCIMX28RM, Rev 2, 08/2013), where DRAM low power mode

is used.

Have a great day,
Yuri

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[eishishibusawa]

Dear Yuri

Customer needs the answer until Friday(9/30).

(Customer is planning the release of software on October 4.)

Please answer as soon as possible.

Best Regards,

Eishi SHIBUSAWA

[Yuri]

Hello,

You may use DRAM Control Register 16 (HW_DRAM_CTL16), bit POWER_DOWN

for the Deep Power-Down mode.

Regards,

Yuri.

[eishishibusawa]

Dear Yuri

Thank you for your support.

I have reported the answer to Customer.

Best Regards,

Eishi SHIBUSAWA

[eishishibusawa]

Dear Yuri

What situation for this matter?

Please advice for us as soon as possible.

Best Regards,

Eishi SHIBUSAWA.

[eishishibusawa]

Dear Yuri

Thank you for your reply.

I think that your suggestion is how to change the clock frequency of DDR memory I/F.

Q1.

I want to know how to enter the Deep power down mode by using i.MX283(EMI)?

Customer uses the PLD609416B.

Please refer to the following URL document P49 about Deep Power Down mode.

Best Regards,

Eishi SHIBUSAWA.

[eishishibusawa]

Dear Yuri

I am sorry to forget writing URL.

I send again.

http://www.piecemakers.com.tw/PM-LPDDR-512M-B-R11.pdf 

Best Regards,

Eishi SHIBUSAWA.

[Yuri]

Hello,

  According to DRAM Datasheet : "The Deep Power-Down (DPD) mode enables very low standby currents. All internal voltage generators inside the LPDDR SDRAM are stopped and all memory data is lost in this mode. All the information in the Mode Register and the Extended Mode Register is lost".

Do You really need such mode, where data are lost ? 

The i.MX28 processor supports two low-power modes, Standby and Suspend-To-RAM.
In Suspend-To-RAM mode the i.MX28 is placed in the Power-Off state. The DRAM is placed in the Self-Refresh state,
and all the context and register values are stored in the DRAM to allow the device to wake up quickly on

resume. Entering and leaving this mode is the same as described in the mentioned section 14.3.2 of
i.MX28 RM.

 You may use DRAM Control Register 16 (HW_DRAM_CTL16), bit POWER_DOWN for the Deep Power-Down mode.

Regards,

Yuri.