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PL310, prefetch & errata 765569

Question asked by Vincent Siles on Sep 7, 2016
Latest reply on Sep 12, 2016 by Vincent Siles

i.MX6 errata 765569 states that the prefetch offset of the aux control register of the PL310 should be set to any value but 23. By default, this value is 0. Why is NXP's BSP setting this value to 0xf instead of leaving it set to 0 ?

 

Best regards,

Vincent

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